The two resistor Compact Thermal model consists of three super-nodes: the junction, the case, and the board. The junction is also referred to as the die or the chip. The case is the top surface of the package, and is where a heat sink may be mounted to the package. The board node is connected by a thermal resistance () between the board and the junction or chip. The case is connected by a thermal resistance () between the case and the junction. Heat transfer to/from the junction can only take place through these two connections.
In Autodesk Simulation CFD, the junction is considered a single finite element node. However, the board and case connections to that single node may contain many finite element nodes according to the mesh sizes used on the surfaces surrounding the two resistor component. To force these many nodes to simulate the effect of one node, a high thermal conductivity is used.
To connect the single junction node to the other finite element nodes, an energy balance on the junction is performed according to:
- qv is heat generated by the chip
- Tb is the board temperature
- Tc is the case temperature
- Tj is the junction temperature
This equation is set up and assembled into the energy equation solution matrix containing the discretized energy equation described earlier and solved implicitly by Autodesk Simulation CFD.