The RestrictCopper layer defines areas on a PCB where copper is not allowed. Any copper object—trace, polygon fill, pad, or via—that overlaps a restrict area on one of its targeted routing layers is flagged as a design rule violation.
Use restrict areas when a region of the board must remain copper-free for mechanical, electrical, or RF reasons. Common use cases include:
Each restrict object targets one or more signal layers through the Restricted Layers property. A single restrict area can apply to any combination of routing layers—for example, restricting only the Top layer while leaving inner layers free, or covering Top, Route2, and Bottom simultaneously.
This per-object layer targeting means you can define highly specific routing constraints without creating separate restrict areas for each layer.
Restrict objects are drawn on the RestrictCopper layer. Fusion supports polygons, rectangles, circles, and wires on the RestrictCopper layer, so you can match the shape of the restrict area to the geometry of the component or region you are protecting.
The RestrictCopper layer visibility toggle in the Display Layers panel controls restrict object visibility in two distinct modes:
Older Fusion designs used two separate copper restriction layers—RestrictTop (tRestrict) and RestrictBottom (bRestrict)—one for each outer layer. These layers are deprecated and replaced by the unified RestrictCopper layer with per-object Restricted Layers targeting.
When you open a legacy design, Fusion migrates restrict objects automatically:
Restricted Layers = Top.Restricted Layers = Bottom.No manual action is required. The migrated design behaves identically to the original for DRC purposes.
If a migrated design has not had any inner-layer restrictions added or modified, Fusion saves it back in the legacy format, preserving compatibility with older versions.
If the design contains any restrict object that targets inner routing layers, Fusion saves in the new format and displays a warning:
This design uses inner layer routing restrictions which are not supported in older versions of Fusion. Saving in the new format will make this file incompatible with older versions.
When you run a Design Rule Check (DRC), Fusion reports a violation for every copper object that overlaps a restrict area on one of its targeted layers. Restrict areas do not affect via placement. Via exclusions are managed separately using the RestrictVias layer.