About the Circuit Builder Drawing Templates

Each circuit starts with a main drawing template. These main circuit template drawings are named “ace_cb1*.dwg”. Branching or nested circuit drawing templates are named “ace_cb2*.dwg”. A branching circuit is a circuit inserted as an option on to the main circuit, for example a control transformer circuit or a power factor correction circuit.

The circuit drawing templates use the following naming convention.

• ace_cb1_*.dwg - primary circuit drawing templates
• ace_cb2_*.dwg - branching or nested circuit drawing templates

The default location for the circuit drawing templates is the schematic library folder: C:\Users\Public\Documents\Autodesk\AcadE {version}\Libs\{library}\.

One-line template drawings have a “1-” suffix. The default location is in a “1-” folder under the schematic library folder: C:\Users\Public\Documents\Autodesk\AcadE {version}\Libs\{library}\1-.

Note: This template drawing naming convention is recommended but is not required for Circuit Builder to function.

A circuit template contains the wiring framework for the circuit and special marker blocks. These marker blocks are nothing more than instances of a standard AutoCAD block, ace_cb_marker_block, carrying three attributes. These marker blocks tell Circuit Builder that some action or decision is required at the insertion point of the marker block. The action can be:

• Insert a component.
• Insert a multi-pole component.
• Make a wire type assignment to the underlying wire.
• Insert a wire number on the underlying wire.
• Decide if a branching circuit is needed.
• Decide if an underlying wire stretches and connects to a nearby power bus.
• Decide if underlying wire bus spacing adjusts.
• Decide if an underlying wire is trimmed.
• Set up the circuit annotation.

Note: If you choose to Insert a circuit, bypassing the Circuit Configuration dialog box, the default options, as defined in the Circuit Builder Spreadsheet, for each circuit element are used.

Marker block attributes

CODE	This attribute value provides the link between the marker block on the circuit template drawing and a section in the circuit codes sheet. The value on this attribute matches with the CODE column value in the circuit codes sheet for the selected template.
ORDER	This attribute value controls the sequence of circuit element display and insertion within the circuit. Marker blocks are processed in order, from low to high. Assigning the same order value to multiple marker blocks links multiple marker blocks together for processing as a group. For example, to adjust the spacing between multiple wires of a 3-phase bus there are three marker blocks with a common CODE value and a common ORDER value. The ORDER value can be an integer or a decimal number value. Support for decimal number order values makes it easy to add a marker block between two others without having to reorder everything.
MISC1	This attribute value contains miscellaneous annotation values, actions, and flags. Annotation values are in the format <attribute name>=<attribute value>. Actions can include embedded AutoLISP expressions or programs. Flags are key words that include enabling child contacts to link to parents and overriding multi-pole build directions. Flag codes include the following _TAGFMT=<value> - override the drawing property component tag format or wire number format setting for this one instance. _PRETAG=<value> - predefine a default alias tag for parent child linking. This option can be used for situations when the child component is inserted before the parent. For example, the marker block for the child contact has "_PRETAG=MR". When the parent coil is inserted, its marker block also has "_PRETAG=MR". As the circuit completes, the actual tag value of the parent annotates on to the child contact. This action is based upon the matching "MR" alias assigned to each. _WIRENO=<value> - predefine a fixed wire number. WIRENUMBERS=0 - if a required wire type does not exist, create it and mark it as No Wire Numbering. If a required wire type does not exist and this flag is missing or has a value of 1, create it and mark it as Wire Numbering. _WIRETYPE=<value> - predefine the wire type layer name. _WIRESKIP=<value> - number of wires to skip over when trying to connect to another wire. _MAXTRAPCOUNT=<value> - maximum search distance to look for a wire connection, given in wire connection trap units. The wire connection trap value is fixed and is displayed on the Drawing properties: drawing format tab for the active drawing. _BASE - indicates a base wire, the one that does not move, when setting up to adjust multiple bus wire spacing. If not defined, the wire that is co-linear with the insertion point of the template becomes the default base wire. _L =<value>- each sublist, delimited by "|" characters, can predefine attribute values for individual poles of a multi-pole component, set of terminals, or set of cable markers. _D=<value> - define the build direction override for a multi-pole component. 1=build right, 2=build up, 4=build left, 8=build down. Without an override, the build direction is down for horizontal inserts, and from left to right for vertical inserts. X=<value or AutoLISP expression> - reposition the marker block in the "X" direction. For example, "_X=(* 0.5 DIST01)" means adjust the position of this marker block in the X direction by an amount equal to 0.5 times the bus spacing distance defined by marker block with a CODE attribute value of "DIST01". This example can be used to position a marker block for a single phase motor insertion point, halfway between two power bus wires. _Y=<value or AutoLISP expression> - reposition the marker block in the "Y" direction.

Note: The flags defined in the circuit drawing marker blocks override any spreadsheet settings.

Marker block functions

All marker blocks have the same block name, ace_cb_marker_block, but can have a wide variety of functions. The specific function assigned to a marker is based on its CODE attribute value and what this code value maps back to in the circuit code sheet for the circuit template. Here are the categories of marker block functions:

Setup	Blocks that define the circuit properties, such as motor selection.
Wire Type	Blocks that define the wire type layers layer to assign to the wire network under the block.
Wire Number	Blocks that define a wire number to assign to the wire under the block.
Nested Circuit	Blocks that define the placement of a branching or nested circuit such as a control circuit at the insertion point of the marker block.
Component	Blocks that define the placement of a component, connector, terminal, cable marker, or a multi-pole component at the insertion point of the marker block.
Bus Spacing	Blocks that control rung spacing adjustment for the wires under these blocks. Blocks that are processed as a group must carry common CODE and ORDER attribute values.
Wire Connections	Blocks that control stretching a wire segment to connect to another wire.

Note: The name of the marker block cannot be changed. The Circuit Builder command only processes marker blocks named "ace_cb_marker_block".

One-line circuit templates

One-line circuit templates use the same marker block concept as three-phase motor and power feed circuit templates. However, there are a few differences. There is a single line wire that represents a multi-wire bus. Most of the one-line circuit templates contain a special "bus-tap" symbol.

The bus-tap symbol can have two functions:

• Provide an anchor point for the one-line circuit representation that begins at this location.
• Break into the one-line bus where the circuit connects.

On a dual circuit one-line template, there are three of bus-tap symbols. One at the normal point where the circuit ties into the bus. There is another version of the symbol on each of the two circuit "legs", each marking the point where that part of the dual circuit starts. These bus-tap symbols allow various reports to report accurately on a one-line circuit, whether a single circuit or a dual circuit representation.

The following bus-tap symbols are supplied:

• HDV1_BT_1-.dwg - with “dot” for horizontal one-line circuit
• VDV1_BT_1-.dwg - with “dot” for vertical one-line circuit
• HDV1_BTT_1-.dwg - “tee” connection for dual horizontal circuit
• VDV1_BTT_1-.dwg - “tee” connection for dual vertical circuit
• HDV1_BTL_1-.dwg - “corner” connection for dual horizontal circuit
• VDV1_BTL_1-.dwg - “corner” connection for dual vertical circuit

Note: A WDTYPE attribute with a “1-1” value, identifies a bus-tap symbol.